
MYXPM6021*
Revision 1.1 - 10/21/14
*Advanced information. Subject to change without notice.
51
MYXPM6021*
Form #: CSI-D-685 Document 011
9.6.6.2 VDDQ Subsystems
V1P2S:
ThisvoltagerailisusedtosupplymainlytheMIPinterface.Incaseof1.24VDDR3memorytheinputvoltageofthispower
domainisVDDQanditactsasapowerswitch.ForallothertypesofDDR3memoriestheinputvoltageisV1P8Aand
V1P2SisgeneratedviaasmallLDO.
Table 23: V1P2S Power Switch Specication
Description Value [max, mΩ]
Input power path board resistance 20
Output power path board resistance 20
Input, output rails wirebond & internal FET RDS-ON 620
Table 24: Electrical Parameter for V1P2S LDO
Symbol Parameter Min Typ Max Unit Notes / Condition
Input Requirement
Vin Main input voltage 1.80 V Supplied by V1P8A
Cin V1P2S_IN 100 nF
Output Requirement
Vnom Nominal output voltage 1.2 V
Vtol Output voltage tolerance -2% +2%
Cout Output capacity 2.2 μF
Iout-DC Output load current 1 50 mA
IQSC Quiescent current
(operational)
10 μA Iout-DC = 0mA
IQSC Quiescent current
(sleep)
2 μA Iout-DC = 0mA
PSRR Power supply rejection ratio 50 dB Noise = 0.1Vpp, 1-
10kHz, ½ Iout-DC
Vnoise Output Noise 50 100 μVRMS 10-100kHz, ½ Iout-DC
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